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Understand some basic integrated circuit chips for processing data

October 27, 2022

At present, there are two kinds of civilizations in the world, one is a carbon-based civilization composed of human society, and the other is a silicon-based civilization composed of various chips. Because almost all chips are made of single crystal silicon, the chip The total number of systems is tens of times more than the number of humans. The chip family is also divided into various types of chips. From the ancient tons of logic gates piled up with electronic tubes to the current super data center, the development of electronic technology has passed generation after generation. Today, various chips More is a hundred flowers, chip manufacturers contend.

Understand some basic integrated circuit chips for processing data

However, so many chips, classified by function, are used exclusively for calculations, are used exclusively for control, and are dedicated to storage... according to the scale of integrated circuits, there are super large scale, large scale, and old medium scale Small scale. And specific to the type, there are CPU, SoC, DSP... There are so many chips, it really takes a lot of effort to distinguish the cleanup, this article can lead you to understand some basic, used to process data. Integrated circuit chip.

Among these chips dedicated to processing data, the most commonly used microprocessor system consists of microprocessors, ranging from a single-chip microcomputer to dozens of tens of cores in the data center. Developed by a simple microprocessor system, the microprocessor is the most widely used chip. First understand the microprocessor and microprocessor system, it is very helpful to understand the various chips and control systems.

Microprocessor system

The microprocessor system includes various types of computers, microcontrollers/microcontrollers. The total number of microprocessor systems in the world is much larger than the total number of humans. Its basic working principle is to use the program to control the behavior of the system.

The basic operation process of the microprocessor system is that the central processing unit (CPU) continuously fetches and executes from the memory to realize the overall management of the system.

First, the CPU structure and function of the CPU structure:

▲ Figure: CPU structure

1) Controller: Complete the read, register, decode and execute of the instruction.

2) Register: Temporarily stores the generated address and data used for the addressing and calculation process.

3) I/O Control Logic: Responsible for logic related to input/output operations in the CPU.

4) Arithmetic & Logic Unit (ALU): The core of the operator, responsible for performing arithmetic operations, logic operations, and shift operations for numerical calculations and generating memory access addresses.

CPU function:

1) Exchange information with the memory.

2) Exchange information with I/O devices.

3) Receive and output the necessary signals, such as reset signals, power supplies, input clock pulses, etc., in order for the system to work properly.

Second, the structure of the microprocessor system

▲ Figure: Structure of the microprocessor system

1) The external features of the CPU are a limited number of input and output pins.

2) Data bus: used to transfer data between CPU and memory or I/O interface, two-way communication; the number of data bus determines the number of bits that can be exchanged between CPU and memory or I/O device at most. The number of bits of the device, such as: Intel 386DX, ARM Cortex-M3 is a 32-bit microprocessor; Intel uses the IA-64 architecture processor, PowerPC 970 is a 64-bit processor; similarly, there is more ancient 8-bit, 16-bit processor, etc.

3) Address bus: The CPU outputs the address code through the address bus to select a certain memory unit or a register that becomes an I/O port for one-way communication; the number of address buses determines the number of bits of the address code, which in turn determines The size of the storage space, for example, the address bus width (number of bars) is 8, you can mark 2^8 = 256 storage units. If the word length of each storage unit is 8 bits, the maximum storage space of the system can be accessed. It is 256kB.

4) Control bus: used to transfer control information sent from the CPU or status information sent to the CPU by the peripheral, two-way communication;

The programming language of a microprocessor system: Programming Language, also known as a programming language, is used to define a computer program that issues instructions to the processor through code. The programming language allows developers to accurately provide the data used by the computer and precisely control the actions that should be taken in different situations. The earliest programming language was created after the invention of the computer, which was used to control the jacquard loom and automatically play the piano. Thousands of different programming languages ​​have been invented in the computer field, and new programming languages ​​are still in place every year. Many programming languages ​​require instructions to describe the program being calculated, while some programming languages ​​are declarative programming, indicating the desired results, rather than how to calculate them.

Machine language: Each statement of the machine language is an instruction that the processor can directly execute. These instructions are expressed in the form of a binary 0, 1 sequence, corresponding to the high and low levels of the digital integrated circuit. The machine code of different processor instructions is different, and the specific functions to be completed will also be different. A program written according to a computer machine instruction cannot be executed on another computer.

Example: (for example only, machine code that does not represent real hardware)

Machine code of the instruction:

0000'0000 STORE

0000'0001 LOAD

Machine code for the address:

0000'0000 register R0

0000'0001 register R1

Advantages: The function and code correspond one-to-one, the CPU can be executed directly, and the efficiency is the highest.

Disadvantages: Only binary 0, 1 sequence, boring, difficult to identify.

Assembly language: replace a specific machine language instruction with a simple English alphabet, symbol string - binary 0, 1 sequence: replace the opcode with a mnemonic (Memoni), replace it with an address symbol (Symbol) or label (Label) address code. Assembly language has a one-to-one correspondence with machine language, so it has a great dependence on computer hardware like machine language.

Example: Addition (semicolon indicates comment)

MOV R1,? R3;

Assign the value of register R3 to R1

LDR R2, [R4]

; assign the value of the storage space corresponding to the address represented by the value of register R4 to R2

ADCS R0, R1, R2

; Add registers R1, R2 to the previous carry value and carry, store to register R0

Advantages: assembly statements and machine language one-to-one correspondence, mnemonics and labels are often related to the actual meaning, compared to machine language, more intuitive, easy to understand, and similar in execution efficiency.

Disadvantages: Different processor instruction sets are different, portability is not good; even if the simple data processing (such as accumulating, simple sorting, etc.) is required, the code required is very large, and the workload required to handle the actual problem is exaggerated and costly.

High-level language: Use an expression description program that is close to a mathematical or human language.

Features: Compared to machine language and assembly language for machine development, high-level languages ​​have higher readability and greatly reduced code size; high-level languages ​​are usually far from direct manipulation of hardware, high security, and some high-level languages. The hardware can be manipulated using an interface that calls assembly language; high-level languages ​​have many mature, easy-to-use, portable data structures and algorithms that greatly simplify the development process, save development costs, and are easy to maintain; rapid development, complete community, and convenient Help, solve various problems encountered; there are already many high-level languages ​​with different characteristics to solve different problems and develop quite well for developers to choose, such as: Basic for beginners to understand programming ideas; high efficiency, Close to hardware control, suitable for system, hardware driver programming and embedded development C / C + +; cross-platform, portable features of Java; with Visual Studio can quickly develop project C #. NET; suitable for data analysis, artificial intelligence, Python is getting more and more popular; Microsoft is opening for future quantum computing The Q #, and so on. Languages ​​such as MATLAB, HTML, and JavaScript that can be used in different fields can also be called high-level languages.

Example: Addition

Int a = 1, b = 2, c;

c = a + b;

Advantages: It does not depend on hardware, and has good portability; it is not necessary to choose the appropriate language for high development efficiency.

Disadvantages: Do not use hardware directly, need to compile-link execution or explain execution, without using the characteristics of specific hardware, efficiency is not high compared to machine language and assembly language; innate characteristics determine that high-level language can not be completely in the underlying design Replace machine language and assembly language.

It can be seen that the core component of the microprocessor system is the CPU. The essence of using the microprocessor system to control the operation of the external device is to use a means of writing a software program to control the external device. Since the CPU is already a complete, packaged component, the system designer can only execute it by writing software and then translating it into a machine-understandable code via a compiler or interpreter. The CPU does not have a dedicated hardware circuit to implement it completely. Ground control of the operation of external devices, this implementation is a software implementation, is a general implementation, control signals from software to hardware through several conversions, but sometimes, engineering and design fields often require high-speed and high-performance chips To achieve control and calculation, you need a more powerful CPU or a few CPUs to work together in parallel, and the cost will increase. At this time, you can try to design special hardware to meet the needs of the work.

Third, the application specific integrated circuit

An Application Specific Integrated Circuit (ASIC) is an integrated circuit designed for a specific purpose. Refers to integrated circuits designed and manufactured to meet the needs of specific users and the needs of specific electronic systems. ASIC is characterized by the needs of specific users. ASICs have the advantages of smaller size, lower power consumption, higher reliability, improved performance, enhanced confidentiality, and lower cost compared with general-purpose integrated circuits in mass production.

ASICs are divided into full custom and semi-custom. Full custom design requires the designer to complete all circuit design, including all processes of chip design, so it requires a lot of manpower and resources, flexibility and low development efficiency. If the design is ideal, full customization can run faster than a semi-custom ASIC chip. Semi-custom ASICs use a quasi-logic unit (Standard Cell), which can be selected from standard logic cell libraries for SSI (small scale integrated circuits such as gates), MSI (medium scale integrated circuits such as adders, comparators, etc.). Data paths (such as ALU, memory, bus, etc.), memory and even system-level modules (such as multipliers, microcontrollers, etc.) and IP cores, these logic units have been laid out and designed to be more reliable, designers can more easily Complete the system design.

The design direction of today's ASICs has been increasingly constructed using programmable logic devices, the threshold for development is decreasing, the process is simplistic, the cost is declining, and the business is beginning to become rich and diverse. At present, ASIC has moved to high-tech fields such as deep learning, artificial intelligence, and fifth-generation mobile communication technology (5G). Under the impetus of two major programmable logic devices, Xilinx and Altera, it is expected that future ASIC designs will be programmable. The world of logic devices (especially field-programmable gate arrays, FPGAs).

Fourth, programmable logic device

A Programmable Logic Device (PLD) is a general-purpose integrated circuit that is a subset of an ASIC that can be determined by user-programming the device. The general PLD is highly integrated enough to meet the needs of designing a general digital system. This allows the designer to "integrate" a digital system on a PLD without having to ask the chip manufacturer to design and fabricate the ASIC chip, because the chip cost of designing and manufacturing the ASIC is small if the chip is not in demand. It is very high.

The difference between PLD and general digital chip is that the digital circuit inside PLD can be decided after leaving the factory, and even can be changed without limit. Generally, the digital chip has decided its internal circuit before leaving the factory, and cannot be changed again after leaving the factory. The general analog chip, communication chip, and microcontroller are all the same, and the internal circuit cannot be changed after leaving the factory. Intel’s chip vulnerability incident, which has been raging lately, is because the internal circuitry of the CPU has not been changed, so only a new CPU chip can be designed to solve it, or some performance can be compensated by software patching.

Fifth, the development of programmable logic devices

The earliest Programmable Logic Device (PLD) was a programmable read-only memory (PROM) made in 1970 that consisted of a fixed array and a programmable or array. PROM uses fuse technology and can only be written once and cannot be erased and rewritten. With the development of technology, ultraviolet erasable read only memory (UVEPROM) and electrically erasable read only memory (EEPROM) have appeared. Due to its low price, low speed and easy programming, it is suitable for storing functions and data tables.

Programmable Logic Array (PLA) appeared in the mid-1970s. It consists of programmable and arrays and programmable or arrays. However, due to the relatively expensive price, complicated programming, and low resource utilization, the device is not available. widely used.

Programmable Array Logic (PAL) was first introduced by MMI Corporation in the United States in 1977. It uses fuse programming, consisting of programmable and arrays and fixed or arrays. It is fabricated in a bipolar process and the device operates at high speed. . Due to its flexible design and many output structures, it is the first programmable logic device to be widely used.

General Array Logic (GAL) is the first invented Lattice in 1985 for rewritable, reprogrammable, configurable encryption bits. Based on PAL, GAL uses the output logic macrocell form (EECMOS) process structure. In practical applications, GAL has 100% compatibility with PAL simulation, so GAL almost completely replaces PAL and can replace most standard SSI and MSI integrated chips, so it is widely used.

Erasable Programmable Logic Device (EPLD) is a PLD based on UVEPROM and CMOS technology introduced by Altera Corporation in the mid-1980s. Later, it was developed into a PLD fabricated by EECMOS technology. The basic logic unit of EPLD is a macrocell, and the macrocell is It consists of three parts: programmable and array, programmable register and programmable I/O. In a sense, EPLD is an improved GAL. It increases the number of output macrocells on a GAL basis, providing a larger array and integration density. The internal connection is relatively fixed and the delay is small, which is beneficial to The device operates at high frequencies, but the internal interconnect capability is weak.

Complex Programmable Logic Devices (CPLDs) were introduced in the early 1990s after Lattice introduced Online Programmable Technology (SP) in the late 1980s. CPLD contains at least three structures: programmable logic macrocell programmable I/O unit and programmable internal wiring. It is developed on the basis of EPLD and is manufactured by EECMOS technology. Compared with EPLD, it has added internal connection. Lines, there are also significant improvements to logical macro units and I/O units.

The Field Programmable Gate Array (FPGA) device was first introduced by Xilinx in 1985. It is a new high-density PLD fabricated in a CMOS-SRAM process. The structure of the FPGA is different from that of the gate array PLD. The internal structure is composed of a number of independent programmable logic modules (CLBs). The logic blocks can be flexibly connected to each other. The function of the CLB is very strong, and not only can realize logic functions, but also can be configured into Complex forms such as RAM. The configuration data is stored in the SRAM in the chip, and the designer can modify the logic function of the device in the field, so-called field programmable. After the emergence of FPGA, it was widely welcomed by electronic design engineers and developed very rapidly.

Both FPGA and CPLD have the characteristics of flexible architecture, logic unit, high integration and wide application range. These two devices are compatible with the advantages of simple PLDs and general-purpose gate arrays, enabling large-scale circuits and flexible programming. Compared with ASICs, they have short design and development cycles, low design and manufacturing costs, advanced development tools, and standard products. No need for testing, stable quality, etc., users can repeatedly program, erase, use, or use different software to achieve different functions and real-time online verification when the peripheral circuit is not moving.

CPLD is a complex logic component than PLD. CPLD is a digital integrated circuit that users can construct their own logic functions according to their needs. Compared to FPGAs, CPLDs provide relatively few logic resources, but the classic CPLD architecture provides very good combinational logic implementation and on-chip signal delay predictability, making it ideal for critical control applications.

FPGA is a product of further development based on programmable devices such as PAL, GAL, and EPLD. It emerged as a semi-custom circuit in the ASIC field, providing a wealth of programmable logic resources, easy-to-use storage, computing function modules and good performance, which not only solves the shortcomings of custom circuits, but also overcomes the original There are disadvantages in that the number of programmable device gates is limited.

FPGAs and CPLDs have their own characteristics because of their structural differences. Because the internal structure of the FPGA has a large proportion and number of flip-flops, it has more advantages in the design of sequential logic: CPLD has the characteristics of rich OR gate array resources, and the program power loss is not easy to lose. Circuit. In general, due to the rich and powerful FPGA resources, the application in product development is outstanding. The newly introduced programmable logic device chips are mainly based on FPGAs. With the advancement of semiconductor technology, the power loss is getting smaller and smaller. The level of integration is getting higher and higher.

On a microprocessor system, the software designer uses the programming language to control the normal operation of the entire system. In the field of programmable devices, the object of operation is no longer a set of group data types, but some hardware devices, such as memory, counters. Etc. Even some of the lower-level flip-flops, logic gates, and some even have to be precise to the control of the integrated transistor switching stage. And many devices are no longer sequential blocking work, but parallel triggering work, the classic program flow control ideas are not applicable in the field of programmable devices. Designers need to use a language that can construct hardware circuits, the hardware description language.

Sixth, hardware description language

Hardware Description Language (HDL) is a language that uses formal methods to describe logic circuits and systems. Using this language, the design of logic circuits can describe their design ideas layer by layer from the upper layer to the lower layer (from abstract to concrete), and use a series of hierarchical modules to represent extremely complex logic systems. Then, using the Electronic Design Automation (EDA) tool, the simulation verification is performed layer by layer, and then the modules that need to be turned into actual circuits are converted into the gate level circuit net table through the automatic synthesis tool. Next, an application-specific integrated circuit (ASIC) or field-programmable gate array (FPGA) automatic placement and routing tool is used to convert the netlist into a specific circuit routing structure to be implemented. According to statistics, about 90% of ASICs and PLDs in Silicon Valley in the United States are currently designed using hardware description languages.

The hardware description language HDL has been in development for more than 30 years and has been successfully applied in all phases of design: modeling, simulation, verification and synthesis. By the 1980s, hundreds of hardware description languages ​​had emerged, which had greatly promoted and promoted design automation. However, these languages ​​are generally oriented to specific design areas and levels, and many languages ​​make users feel at a loss. Therefore, there is a need for a multi-domain, multi-level, and generally accepted standard hardware description language for design. From the late 1980s to the 1990s, the VHDL and Verilog HDL languages ​​adapted to this trend and became the Institute of Electrical & Electronics Engineers (IEEE) standard.

Now, with the advent of very large-scale FPGAs and FPGA chips containing SoC cores, hardware and software coordination design and system design are becoming more and more important. Hardware design in the traditional sense is increasingly inclined to integrate with system design and software design. The hardware description language adapts to the new situation and develops rapidly. Many new hardware description languages ​​appear, such as System Verilog, SystemC, Cynlib C++, etc. On the other hand, the PLD design tool originally only supports hardware description language design input. , increasing design support for traditional high-level design languages ​​such as C/C++.

At present, the hardware description language can be described as a hundred flowers, VHDL, Verilog HDL, Superlog, SystemC, System Verilog, Cynlib C++, C Level and so on. Overall, VHDL and Verilog HDL are the most widely used in PLD development. As the scale of logic system development continues to increase, system-level hardware description languages ​​such as SystemC and System Verilog are also being used more and more.

VHDL

As early as 1980, the US Department of Defense began the development of VHDL because the US military industry needed a way to describe electronic systems. In 1987, the IEEE established VHDL as a standard. The reference manual is the IEEE VHDL Language Reference Manual Standard Draft 1076/B, which was approved in 1987 and is called IEEE 1076-1987. However, at first VHDL was only a standard for system specifications, not for design. The second version was developed in 1993 and is called VHDL-93, adding some new commands and properties.

Although there is a saying that "VHDL is a $400 million mistake", VHDL is the only hardware description language that was established as the standard before 1995. This is its indisputable fact and advantage; but at the same time it is quite troublesome to use. Moreover, its comprehensive library has not been standardized so far, and it does not have the ability to describe the transistor switch stage analog design. At present, VHDL is more suitable for the design of very large system-level logic circuits.

Essentially, the underlying VHDL design environment is supported by the device library described by Verilog HDL, so interoperability between them is important. Currently, Verilog and VHDL's two international organizations, OVI (Open Verilog International) and VI, are planning this work and are preparing to set up a dedicated working group to coordinate the interoperability of VHDL and Verilog HDL languages. OVI also supports the free expression of VHDL to Verilog without the need for translation.

Verilog HDL

Verilog HDL was first created in 1983 by Phil Moorby of GDA (Gateway Design AUTOMATION). Phil Moorby later became the main designer of Verilog-XL and the first partner of Cadence. In 1984-1985, Phil Moorby designed the first simulator called Verilog-XL; in 1986, he made another huge contribution to the development of Verilog HDL: proposed for fast gate-level simulation. XL algorithm.

With the success of the Verilog-XL algorithm, the Verilog HDL language has grown rapidly. In 1989, Cadence acquired GDA, and the Verilog HDL language became a private property of Cadence. In 1990, Cadence decided to open the Verilog HDL language, and established the OVI organization to promote the development of the Verilog HDL language. Based on the superiority of Verilog HDL, the IEEE developed the IEEE standard for Verilog HDL in 1995, namely Verilog HDL 1364-1995; in 2001, the Verilog HDL 1364-2001 standard was released, in which the Verilog HDL-A standard was added. Enable Verilog HDL to have the ability to simulate design descriptions

SystemC

With the rapid development of semiconductor technology, SoC has become the development direction of today's integrated circuit design. The processor in smart phones and tablets is strictly SoC because it integrates CPU and graphics processing unit (Graphic). Processing Unit, GPU), Digital Signal Processor, Baseband signal processor, etc. In the various designs of system chips (such as system definition, hardware and software partitioning, design implementation, etc.), the IC design community has been considering how to meet the design requirements of SoCs, and has been looking for a software and hardware that can achieve higher levels at the same time. System-level design language

It is in this context that SystemC was developed by Synopsys and Coware in response to the current demand for system-level design languages. On September 27, 1999, more than 40 world-renowned EDA companies, IP companies, semiconductor companies and embedded software companies announced the establishment of the "Open SystemC Alliance." The famous company Cadence also joined the SystemC Alliance in 2001. SystemC has been updated since the initial version of the Alliance in September 1999, from version 1.0 to version 1.1, until the latest version 2.0 was released in October 2001.

Seven, common data processing chip

Now that we have combed the concepts and principles of the two major classes (microprocessors, ASICs), let’s take a look at common chips.

MCU

The most common microprocessor system in daily life is the tiny computer around us, which is a personal computer (PC), which can make desktop, notebook, or PC rookie - all kinds of cool two One device. These seemingly complex electronic systems are developed by the simplest microprocessor system. But life doesn't need so many computers. For example, if you want to make a rice cooker that can automatically control heating and insulation, its CPU performance may only need a big guy like a computer, and it doesn't need complicated input and output equipment. In the design, you can cut off the unused parts and flexibly use the CPU, clock generator, random access memory (RAM), read-only memory (ROM) and The required external devices are integrated and miniaturized. All of the greatly improved microprocessor systems are integrated on a single chip called a Micro Controller Unit (MCU). At present, the MCU is the most widely used electronic control chip, and its control program can be downloaded to the ROM by a special burning tool to perform the functions of the system. These ROMs can be made of PROM, UVEPROM, EEPROM, etc. If there is no integrated ROM on the MCU, an external ROM can be used. According to the system structure, the microprocessor system can be divided into von Neumann structure (also known as Preston structure) and Harvard structure. The difference is that the program and data are stored in different ways. Similarly, the MCU chip can also be divided into These two structures are flexible enough to meet your needs.

MPU

Micro Processor Unit (MPU) is a chip that integrates many CPUs to process data in parallel. In general, MCUs integrate RAM, ROM and other devices; MPU does not integrate these devices, is a highly integrated general-purpose CPU matrix, or can be considered as an MCU with integrated peripherals removed.

PLD (CPLD/FPGA)

Since the widely used PLDs are CPLDs and FPGAs, these two chips are introduced as examples. As mentioned above, the internal structure of the CPLD/FPGA is completely different from that of the CPU. The internal circuit can be modified many times, and different combination logic circuits and sequential logic circuit structures can be formed according to the user's programming. It is a "universal" chip. CPLD/FPGA looks like a CPU, but it is not, because the control is pure hardware implementation using CPLD/FPGA, which is essentially the same as the digital logic circuit built with thousands of basic logic gates. Therefore, you can directly use HDL programming to build a "CPU" in the CPLD/FPGA (sometimes there are hard and soft cores, limited space, no longer go into details), and then do the corresponding I / O, bus, is a A simple microprocessor system. But in this way, it has become software control, and the hardware control advantage of PLD has disappeared. Therefore, CPLD/FPGA is often used in conjunction with the actual CPU. Some computational circuits of more complex algorithms are written on the CPLD/FPGA. When the CPU processes these complex tasks, it is processed by the CPLD/FPGA. After the processing ends, the result will be processed. Return to the CPU to improve the overall performance of the control system.

Understand some basic integrated circuit chips for processing data

ADC, DAC

The physical quantities of nature are divided into two types: analog (Analog) and digital (Digital). The value of the analog quantity in a certain range is continuous, and the number is infinite; the value of the digital quantity within a certain range is discrete, and the number is limited. The computer can only process discrete digital quantities, so the analog signal must be transformed before it can be processed by the computer. The physical quantity of nature is converted into a continuously changing current or voltage (so called "simulation"), and is sampled under the condition that the Nyquist Sampling Theory (also known as Shannon Sampling Theory) is satisfied. The domain discrete signal is quantized by a quantizer (which can be linear quantization and nonlinear quantization), and finally the binary 0 and 1 digital information is encoded by a single code before being processed by a computer. The above transformation is called analog-to-digital conversion (A/D). This part of the circuit can be integrated on a chip. This is the Analog Digital Circuit (ADC), and the corresponding digital-to-analog conversion (D/). A) and the Digital Analog Circuit (DAC) chip, when performing D/A, also satisfy the relevant theorems in mathematics and information theory.

DSP

A Digital Signal Processor (DSP) is a dedicated chip for processing digital signals at high speed.

After the digital signal converted by the ADC, the amount of data is often very large, and the efficiency directly handled by the CPU is not high, and the CPU has to perform more general-purpose computing tasks. Therefore, dedicated circuits are often used to process digital signals such as digital filtering, fast Fourier transform, time-frequency analysis, processing of speech signals and image signals, and the like. These operations are often complicated, many involve complex accumulation and multiplication operations. For example, the calculation of discrete Fourier transform is very complicated, but you can use the fast Fourier transform algorithm of time domain extraction or frequency domain extraction. The amount of computation is greatly reduced, but the circuit is more complicated. The circuit that can complete these complex operations is integrated on one chip, and can perform a multiply-add operation in one clock cycle, so that it can perform complex operations such as base 2-FFT butterfly operation, audio filtering, image processing, etc. Called DSP. DSP is also a special kind of CPU, especially suitable for signal processing. For example, Node B in 3G uses DSP for signal processing. DSP's processing power for streaming media is far superior to that of CPU. Now the voice signals on mobile phones are processed by DSP. At present, the concept of DSP is becoming blurred. For example, the architecture of ARM9 is not like a CPU, but more like a DSP. There are many chips now, which integrate DSP, GPU, baseband processor, etc. More and more traditional discrete chips are integrated to work together to improve efficiency and reduce energy consumption. This is also a trend in the future. .

SoC

With the rapid development of semiconductor technology, mobile Internet and intelligent terminals, the development of traditional microprocessor systems has not kept up with the trend of the times. Modern information technology urgently needs a chip with many functions, strong performance and low power consumption. Meet the needs of more and more smart devices. SoC came into being.

SoC's full name is System on a Chip. As its name suggests, it integrates an entire information processing system on a chip called a system-on-chip or system-on-chip. This definition is not entirely clear now, because the components integrated on different SoCs are different. In general, the SoC is a complete whole and already has the full functionality of the entire digital system. It is also an ASIC, including Complete control system with embedded software.

SoC also represents a technology, which is a technology that aims to determine the function of the system, the software and hardware of each module are jointly developed, and finally the development results are integrated into one chip. Due to its rich features and demanding performance, SoC is already the most versatile hardware, integrating CPU, GPU, RAM, ADC/DAC, Modem, high-speed DSP and other chips, and some SoCs. The power management module must be integrated, and the control modules of various external devices should fully consider the distribution and utilization of each bus. Nowadays, many related communication modules such as the above components and baseband processors are integrated on the SoC in the smartphone.

The SoC circuit is more complex than the traditional microprocessor system, and its design and manufacturing process requirements are naturally higher, and the dependence on software and hardware collaborative development is quite high. So far, the leading companies in the semiconductor industry have the ability to design and manufacture SoCs. Currently, in the field of performance and power-sensitive terminal chips, SoCs have dominated, and the mobile phones used by people every day have strong performance. The always-on SoC is serving us. Even the traditional software giant Microsoft has launched the Windows operating system based on Qualcomm's Snapdragon 835 platform; and SoC applications are expanding into a wider field, SoC in the UAV technology, autonomous driving, deep learning and other industries There are also more and more applications, a complete electronic system can be realized with a single chip, which is the future development direction of the semiconductor industry and IC industry.

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